A New Control Flow Checking Method to Improve Reliability of Embedded Systems

Authors

1 Department of Computer Engineering, Boroujerd Science and Research Branch, Islamic Azad University, Boroujerd, Iran

2 Department of Computer Engineering, Boroujerd Branch, Islamic Azad University, Boroujerd, Iran

Abstract

Due to employ of embedded systems for safety-critical applications and high probability of occurrence transient faults in them as well as increasing popularity of COTS (commercial off the shelf) components, techniques of control flow checking to improve reliability processors are of particular importance. Among all the problems of software-based technique for control flow error detection can be pointed to the performance overhead because of software redundancy and lack of proper solution for detecting Intra-block control-flow jump errors. In this article we have proposed a generic software-based technique for control flow error detection that can add instructions redundant on a basic block to detect a large number of errors as well as reduced overhead by identifying S-NODE in control flow graph and placed check instruction in these nodes. Overall, combining CFCSS (Control Flow Checking by Software Signatures) with our proposed technique has an average of 96% fault coverage in comparison to 92% fault coverage of previously proposed signature based techniques while maintaining the performance overhead has nearly SCFC.

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