Design and Implementation of MOSFET Circuits and CNTFET, Ternary Multiplier in the Field of Galois

Document Type: Original Manuscript

Authors

1 Department of Electrical Engineering, Payame Noor University (PNU), Kerman, Iran

2 Department of Computer Engineering, Kerman Branch, Islamic Azad University, Kerman, Iran

Abstract

Due to the high density and the low consumption power in the digital integrated circuits, mostly technology of CMOS is used. During the past times, the Metal oxide silicon field effect transistors (MOSFET) had been used for the design and implementation of the digital integrated circuits because they are compact and also they have the less consumption power and delay to the other transistors. But after discovering the carbon nano-tubes by Ijima et al., several studies have been done on these structures in the other sciences. Single cover nano-tubes due to the electrical traits such as low consumption power, high speed, the compact area with the smallest dimensions in the form of nano by the unique configuration, multiple threshold recognition, least threshold of noise, etc. better than the other nano-tubes. Over the past times, bi-valued logic was used but these days, multi-valued logic (due to the features such as high speed in the transfer of information, decrease of the number of gate, the decrease of operation, etc) is being used. Among the multi-valued logics, triple one because of less evaluated cost of installation and the simple method for implementation of the electronic circuits, is considered more than the other. In this article, by the use of triple-valued field of Galois, the multiplier circuits based on Metal oxide silicon field effect transistors (MOSFET) as well, the transistors of field effect of semi-carbon nano-tubes were designed and implemented.

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